Owing to its high mobility and high electron saturation velocity, GaN-based high electron mobility transistors (HEMTs) have great potential in rf applications.^[1–4] Up to date, the main focus on GaN-based HEMTs is their large output power performance at high operation voltage^[5,6] and high frequency characteristics.^[7–9] However, Intel reports that GaN-based HEMTs have superior performance than Si and GaAs devices at high voltage operation, at low operating voltage GaN-based HEMTs have lower R_on than Si-based transistors at the same breakdown voltage (V_br), and have advantages over GaAs rf devices in terms of efficiency and output power.^[10] These results signify that the applications of GaN-based HEMTs can extend from the existing high voltage operation into low voltage mobile compatible rf operation modes. For GaN-based high voltage rf devices, one of the most commonly used methods to improve the output power is to increase the operating voltage through the adoption of field plate, back barrier and other technologies.^[11–15] However, for low voltage applications, due to the limitation of operating voltage, the drain voltage applied to the device is generally limited to a fixed lower range, thus the methods of output power improvement are totally different, which can only be obtained by minimizing the parasitic resistance, knee voltage and increasing the output current.

In this paper, due to the strong spontaneous polarization, the InAlN/GaN heterojunction has larger 2DEG than conventional AlGaN/GaN,^[16] thus enables the use of thinner barrier thickness (below 10 nm) while obtaining higher 2DEG (1.7 × 10¹³ cm⁻²).^[17,18] Therefore, based on the advantages in the InAlN/GaN structure, firstly we adopt an 8-nm-thick InAlN barrier to simultaneously obtain large 2DEG density and to suppress the short channel effect. The large 2DEG density could effectively reduce parasitic resistance, which contributes to output power enhancement.^[19] The suppressed short channel effect on the one hand could enable higher frequency operation, which makes the device have a higher gain at a specific frequency, and on the other hand it makes the device to exhibit good pinch-off characteristics, which are necessary for power added efficiency.^[20] Secondly, the source–drain spacing is reduced to 1.2 μm to further decrease parasitic resistance, so as to further enhance the output current and to lower the knee voltage. In addition, a SiN passivation layer with a T-shaped gate structure, which is commonly used in microwave power device, is adopted to suppress current collapse and knee voltage walkout that is related to output power and power added efficiency performance.^[21] The fabricated low-voltage InAlN/GaN HEMT shows a maximum output current of 2.3 A/mm with R_on of 0.9 Ω⋅mm, a maximum extrinsic transconductance of 550 mS/mm, a current collapse of 9%. From small-signal measurement, the f_T/f_max is estimated to be 131 GHz/196 GHz. At the operating frequency of 8 GHz, 64.7%–52.7% PAE associated with 1.6–2.4 W/mm output power density is achieved at V_ds = 6–10 V. It exhibits excellent power performance in the low-voltage operation.

A schematic diagram of the InAlN/GaN HEMT is presented in Fig. 1(a). The heterostructure was grown on a SiC substrate by metal organic chemical vapor deposition (MOCVD), consisting of a 1.2 μm GaN buffer layer, a 1 nm AlN spacer layer, and an 8 nm In_0.17Al_0.83 N barrier layer. The hall measurements showed a carrier density of 1.7 × 10¹³ cm⁻² and sheet resistance of 220 Ω/□ at room temperature.

Fig. 1

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	Fig. 1 (a) Cross section of the InAlN/GaN HEMT. (b) SEM graph of the fabricated InAlN/GaN in the top view.

The device fabrication started with the formation of source and drain ohmic consisting of Ti/Al/Ni/Au metals deposited by electron beam evaporation and annealed at 780 °C for 30 s in N₂ ambient. Afterwards, the device isolation was achieved by using Boron implantation. The ohmic contact resistance was 0.25 Ω⋅mm by using transmission line measurement (TLM). A 120 nm SiN passivation layer was deposited by plasma enhanced chemical vapor deposition (PECVD), and the E-beam lithography (EBL) was adopted to define gate foot. As shown in Fig. 1(b), the 0.15 μm gate foot was opened by CF₄-based etching to remove SiN. Finally, the gate head based on Ni/Au/Ni metals was deposited by electron beam evaporation as shown in Fig. 1(b). The T-shaped gate was formed with the gate length of 0.15 μm, and the gate head of 0.75 μm. The source-drain distance was 1.2 μm.

A Keithley 4200 semiconductor parameter analyzer was used for both dc and pulse measurement of the InAlN/GaN HEMT. Figure 2 shows the transfer characteristics of the device at V_ds = 6 V. The threshold voltage (V_th) in this study is defined as the gate bias intercept of the linear extrapolation of drain current at the peak transconductance. The V_th of this device is –4 V, and peak extrinsic transconductance is 550 mS/mm. The device shows the on/off ratio over 5 × 10⁵, and sub-threshold swing (SS) of 120 mV/decade.

Fig. 2

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	Fig. 2 (a) Transfer characteristics of the InAlN/GaN HEMT in linear coordinates. (b) Transfer characteristics of the InAlN/GaN HEMT in semi-log coordinates.

Figure 3(a) shows the output characteristics of the InAlN/GaN HEMT. The maximum output current of 2.3 A/mm was measured at V_gs = 2 V with R_on of 0.9 Ω⋅mm. The large drain current and lower R_on are attributed to lower sheet resistance and scaled source-drain dimension. In addition, a small output conductance at all gate bias range is attributed to the enhanced aspect ratio. These findings indicate that the InAlN/GaN HEMT has excellent gate control ability and the short channel effect is well suppressed. Figure 3(b) shows the gate leakage of the InAlN/GaN HEMT. It is observed that the gate leakage is lower than 1 mA/mm at V_gs = 2 V, indicating that the gate voltage of 2 V applied to gate is applicable, which is helpful for improving the output current.

Fig. 3

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	Fig. 3 (a) Output characteristics of the InAlN/GaN HEMT. (b) Schottky characteristics of the InAlN/GaN HEMT.

Figure 4(a) shows the pulsed I–V characteristics of the InAlN/GaN HEMT, where the quiescent bias points are chosen at (V_GSQ, V_DSQ) = (0 V, 0 V) and (V_GSQ, V_DSQ) = (–8 V, 10 V). The pulse period and width are 10 μs and 0.5 μs, respectively. The current collapse ratio is about 9%, which enables the rf output current capacity. In this paper, the breakdown voltage is defined as the drain voltage (V_br) that the drain current reaches 1 mA/mm at which gate voltage is biased at –8 V. The V_br of the InAlN/GaN HEMT is 33 V as shown in Fig. 4(b). Obviously, the breakdown is caused by gate leakage.

Fig. 4

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	Fig. 4 (a) Pulsed I–V characteristics of InAlN/GaN HEMT. (b) Off-state breakdown characteristics of InAlN/GaN HEMT.

Fig. 5

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	Fig. 5 Small-signal characteristics of InAlN/GaN HEMT.

The S parameter was measured using an Agilent8363B network analyzer in the frequency range 1–40 GHz with a short-open-load-through calibration. The f_T and f_max were measured by biasing the device at the maximum g_m point (V_gs = –3 V) for V_ds = 8 V. By extrapolating the short circuit current gain (H₂₁) and the maximum stable gain (MSG) curves using –20 dB/decade slopes, f_T and f_max of the InAlN/GaN HEMT are 131 GHz and 196 GHz. The small-signal performance can fully meet the requirement of 5 G applications. Power performance at 8 GHz was measured in continuous wave using an on-wafer load-pull system. Figure 6(a) shows power sweep of the InAlN/GaN HEMT, which is biased at class AB operation at V_ds = 8 V. The PAE was 60%, with output power density of 2.1 W/mm and power gain of 13.3 dB. Figure 6(b) shows the output power density and the PAE versus the drain voltage. The output power density of 1.6–2.4 W/mm associated with 64.7%–52.7% PAE at drain voltage varies from 6 V to 10 V. We notice that the device in Ref. [10] was measured at 2 GHz, demonstrating power density of 0.55 W/mm combined with PAE of 80%, and in Ref.[20] was measured at 10 GHz, demonstrating power density of 2 W/mm associated with PAE of 60%. Compared with the devices measured at adjacent frequency, the power performance of device fabricated in this paper is in relative advanced level among the low voltage range. The excellent power performance at low drain voltage operation can be attributed to the high output current and lower knee voltage. The reasons for high output current and lower knee voltage are strong spontaneous polarization InAlN barrier induced large 2DEG density and smaller source–drain spacing induced lower parasitic resistance.

Fig. 6

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	Fig. 6 (a) Large signal characteristics of the InAlN/GaN HEMT at 8 GHz. (b) Output power and power added efficiency versus drain voltage at 8 GHz.

In summary, an InAlN/GaN HEMT with scaled lateral dimension has been fabricated for high performance low voltage applications. Depending on the strong polarization induced high 2DEG of the InAlN/GaN structure, a thin barrier layer can be used simultaneously to obtain low sheet resistance and to suppress the short channel effect. A highly scaled lateral dimension reduces the access resistance. Measurements show that the fabricated device exhibits very high drain current of 2.3 A/mm accompanied by the R_on of 0.9 Ω⋅mm. The improved on-state characteristic is attributed to the low sheet resistance and the scaled lateral dimension. In addition, the on/off ratio over 5× 10⁵ and SS of 120 mV/decade indicate that the short channel effect is well suppressed. At 8 GHz, the InAlN/GaN HEMT shows output power density of 1.6–2.4 W/mm associated with 64.7%–52.7% PAE at drain voltage varying from 6 V to 10 V. These results show that GaN-based HEMTs are attractive in low voltage and low power field as well as high voltage and high frequency field.